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Book Chapters:

2. Tiansheng Zhang, Jonathan Klamkin, Ajay Joshi, and Ayse K. Coskun. Thermal Management of Silicon Photonic NoCs in Many-core Systems. In Photonic Interconnects for Computing Systems. Editors: Mahdi Nikdast, Gabriela Nicolescu, S├ębastien Le Beux, and Jiang Xu. River Publishers, (ISBN: 978-8-793-51980-0), pp. 227-248, 2017.

1. Tiansheng Zhang, Fulya Kaplan, and Ayse K. Coskun. Thermal Modeling and Management in 3D Stacked Systems. In Physical Design for 3D Integrated Circuits. Editors: Aida Todri-Sanial, and Chuan Seng Tan. CRC Press, (ISBN: 978-1-498-71036-7), pp. 229-244, 2015.

Peer-Reviewed Journal Papers:

2*. Jose Abellan, Ayse K. Coskun, Anjun Gu, Warren Jin, Ajay Joshi, Andrew B. Kahng, Jonathan Klamkin, Cristian Morales, John Recchio, Vaishnav Srinivas and Tiansheng Zhang. Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload Allocation. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 36, No. 5, pp. 801-814, May 2017. PDF

1. Tiansheng Zhang, Jie Meng, and Ayse K. Coskun. Dynamic Cache Pooling in 3D Multicore Processors. In ACM Journal on Emerging Technologies in Computing Systems, Volume 12 Issue 2, August 2015. PDF

Peer-Reviewed Conference Papers:

9. Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy, and Ayse K. Coskun. MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems. In Proceedings of IEEE International Parallel and Distributed Processing Symposium (IPDPS) , 2018 (Acceptance Rate: 24.5%). PDF

8*. Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Saiful Mojumder, and Tiansheng Zhang. Leveraging Thermally-Aware Chiplet Organization in 2.5D Systems to Reclaim Dark Silicon. In Proceedings of Design, Automation and Test in Europe (DATE), 2018 (Acceptance Rate: 23.7%). PDF

7*. Ayse K. Coskun, Anjun Gu, Warren Jin, Ajay Joshi, Andrew B. Kahng, Jonathan Klamkin, Yenai Ma, John Recchio, Vaishnav Srinivas, and Tiansheng Zhang. Cross-layer Floorplan Optimization for Silicon Photonic NoCs In Many-core Systems. In Proceedings of Design, Automation and Test in Europe (DATE), 2016 (Acceptance Rate: 24%). PDF

6. Raphael Landaverde, Tiansheng Zhang, Ayse K. Coskun, and Martin Herbordt. An Investigation of Unified Memory Access Performance in CUDA. In Proceedings of IEEE High Performance Extreme Computing Conference (HPEC) , 2014. PDF

5. Chao Chen, Tiansheng Zhang, Pietro Contu, Jonathan Klamkin, Ayse K. Coskun, and Ajay Joshi. Sharing and Placement of On-chip Laser Sources in Silicon-Photonic NoCs. In Proceedings of International Symposium on Networks-on-Chip (NOCS) , 2014 (Acceptance Rate: 26%). PDF

4. Tiansheng Zhang, Jose Abellan, Ajay Joshi, and Ayse K. Coskun. Thermal Management of Manycore Systems with Silicon-Photonic Networks. In Proceedings of Design, Automation and Test in Europe (DATE) , 2014 (Acceptance Rate: 23.1%). PDF

3. Jie Meng, Tiansheng Zhang, and Ayse K. Coskun. Dynamic Cache Pooling for Improving Energy Efficiency in 3D Stacked Multicore Processors. In Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2013 (Acceptance Rate: 20%). PDF

2. Tiansheng Zhang, Alessandro Cevrero, Giulia Beanato, Panagiotis Athanasopoulos, Ayse K. Coskun, and Yusuf Leblebici. 3D-MMC: A Modular 3D Multi-Core Architecture with Efficient Resource Pooling. In Proceedings of Design, Automation and Test in Europe (DATE), 2013 (Acceptance Rate: 24.8%). PDF

1. Jinxiang Wang, Fangfa Fu, Tiansheng Zhang, and Yuping Chen. A Small-Granularity Solution in 2D-Mesh Network-on-Chip. In Proceedings of IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2010.

Magazine article:

1. Tiansheng Zhang. The Critical Role of Temperature for Silicon-Photonic Network-on-Chip. Circuit Cellar Issue 320, 2017. PDF

Workshop papers:

3. Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy, and Ayse K. Coskun. An Automated Framework for Memory Allocation in Heterogeneous Memory Systems. In Proceedings of Boston Area Architecture (BARC) Workshop, 2018. PDF

2*. Ayse Coskun, Furkan Eris, Ajay Joshi, Andrew B. Kahng, Yenai Ma, Saiful Mojumder, and Tiansheng Zhang. Reclaiming Dark Silicon Using Thermally-Aware Chiplet Organization in 2.5D Integrated Systems. In Proceedings of Boston Area Architecture (BARC) Workshop, 2018. PDF

1. Tiansheng Zhang and Ayse K. Coskun. Resource Management Design in 3D-Stacked Multicore Systems for Improving Energy Efficiency. In Proceedings of Boston Area Architecture (BARC) Workshop, 2015. PDF

* The authorship in these papers is in alphabetical order.
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