Profile: Alexander Taubin

 

Logic design. Design automation. Formal verification. Analysis, synthesis, self-testing and formal verification of high-performance low EMI and low-power asynchronous (self-timed) digital circuits and concurrent systems. Computer-aided design (CAD) tools (methods and algorithms); high-level specification of circuit functionality and behavior, including hardware descriptive languages; models and tools for highly concurrent behavior (Petri Nets, Signal Transition Graph, Finite-State Machine, Reactive Systems, Deadlock Prevention, Satisfiability algorithms, etc). Computer security: side-channel attacks resistance. Computer organization.

Teaching

 

ENG EC751 Springs 2002-2008 - Design of Asynchronous Circuit and Systems

ENG EC311 A2 Fall 2002,   Spring 2009 - Introduction to Logic Design
ENG  SC500 A3 – Spring 2003 - Digital System Design Automation (From HDL to FPGA)

ENG EC551 Falls 2003-2008 - Advanced Digital Design with Verilog and FPGA
ENG EC312 Falls 2003-2009 - Computer Organization.
 

Research Interests

 

Design of asynchronous systems (analysis, synthesis, testing, formal verification and architectural design) and computer-aided design methodology. Computer security: side-channel attacks resistance.

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Comments  |   March 20, 2009