Boston University†† ††††††††† ††††††††† Electrical and Computer Engineering

SC913 EE Design Project†††††† †††††††††††††††††† ††††††††† ††††††††† Summer 2002

 

 

Description:

The Boston University EE Design Project SC913 will focus on the design of a test chip in SiGe BICMOS technology.This test chip will be designed with the intention of characterizing substrate electrical noise in mixed signal VLSI technology, a serious problem in IC applications that mix RF/analog and digital circuits on the same chip at close proximity.Our intention is to utilize a recent SiGe technology, IBMís HP6 or equivalent, which provides an HBT NPN transistor with a 75 GHz Ft along with 0.25 um CMOS devices.The project will use the VLSI Labís Cadence installation of Spectre/RF to model the NPN and CMOS transistors and to design the test chip.Industrial fabrication (or MOSIS resources) will be used to build the test chip sometime in the Fall semester with the intention of characterizing the substrate coupled noise with a RF probe station in the Spring Semester.It is expected that several of the students will be available to follow through with the experimental chip characterization in the Spring 2003 semester.Industrial partnership and affiliation is being sought to provide advice, models, and design expertise in the planning and design of the test chip.

 

Methodology:

The professor and students will plan the circuits for the test chip as a group.Students will work in teams and individually on the design of selected circuits including simulation of the circuit behavior.Circuits will be placed on the chip using Cadence CAD tools, and mask data will be generated in the format acceptable to MOSIS and/or industrial fabs.The mask data will be available for start of processing in early Fall 2002 with anticipation of receiving processed chips sometime in the early Spring 2003.Students can register for either 2 credit hours or 4 credit hours for the course, depending on the amount of time they intend to put in each week during the course.

 

Students:

Seven or eight MS ECE graduate students will be available to work on the SC913 EE design project during the two summer semesters of 2002.Of these 7-8 graduate students, 4-5 will be able to take the project for two (or four) hours of ECE credit due to their stature as Graduate Teaching Fellows, while the remaining two students would like to participate on their own time for the learning experience.These students are 1st and 2nd year ECE graduate students.

 

Two of the ECE graduate students are planning to use the SC913 design project to begin work on their ECE Masterís thesis topics.Their particular project topics will explore areas of research in understanding, modeling, and characterizing electrical substrate noise and its effects on sensitive RF/analog circuits.

 

Textbooks and Other Resources:

  1. Low Power CMOS Radio Receivers, Shaeffer and Lee, Kluwer Publishers, 1999.
  2. The Design of CMOS Radio Frequency Integrated Circuits, Lee, Cambridge Press, 1998
  3. Switching Noise in Mixed-Signal Integrated Circuits, PhD Thesis, Tallis Blalack, Stanford University Dept of EE, December 1997
  4. Simulation Techniques and Solutions for Mixed Signal Coupling in ICís, Verghese, Schmerbeck, and Allstot, Kluwer, 1995 (TK7874.V463)
  5. Extraction and Simulation Techniques for Substrate-coupled Noise in Mixed Signal Integrated Circuits, PhD Thesis, N. K. Verghese, CMU, 1995.
  6. Selected IEEE Journal of Solid State Circuits papers
  7. Cadence Spectre/RF Users Manual

 

Instructor:

Dr. Ronald W. Knepper, Professor ECE

Boston University

Photonics Building, Room 439

(formerly with IBM Semiconductor Research & Development Center)

rknepper@bu.edu, 617-353-0223