SC571 - VLSI Design Principles and Applications   (Spring Semester 2002)


        Text:  Kang and Leblebici, CMOS Digital Integrated Circuits, 1999, McGraw-Hill
        Reference:  Weste and Eshraghian, Principles of CMOS VLSI Design, Addison-Wesley, 1993

       Lecture Notes: (downloadable .ppt files)
           Chapter 1: Introduction to CMOS and Overview of Simple CMOS Circuits view on_line

            Chapter 2:  MOS Transistor Theory, Inverter Circuits, and Bipolar/BICMOS Devices
           Lecture 2A:  MOS Device Theory, Threshold, and Current Equations view on line
           Lecture 2B:  Inverter Circuits view on line
           Lecture 2C:  Bipolar/BICMOS Devices & Inverter Ckts view on line

            Chapter 3:  CMOS Process Technology and Layout Design Rules view on line

            Chapter 6 (Chap 4 in lecture notes):  Transient Switching Characteristics of MOS Inverters
                                                                   Interconnect Delay, Power, Buffer Design

            Chapter 7 (Chap 5A in lecture notes):  NMOS and CMOS Combinational Logic Circuits

            Chapter 8 (Chap 5B in lecture notes):  Sequential MOS Logic Circuits and Registers

            Chapter 9 (Chap 5C in lecture notes):  Dynamic Logic Circuits and Registers

           HW#1  Problem Set           Solution to HW#1 (download file in MS Word)
           HW#2  Problem Set           Solution to HW#2 (download file in MS Word)
           HW#3  Problem Set           Solution to HW#3 (download file in MS Word)
           HW#4  Problem Set           Solution to HW#4 (download file in MS Word)
           HW#5  Problem Set

           Lab 1  - Inverter Sizing and Noise Margin Calculation (using CAzM and Sigview CAD tools)
           Lab 2  - Design and Layout of a 1-bit Adder using Cadence CAD Tools Composer, Analog Environment, Virtuoso, and DRC
           Lab 3  - Design for Performance (design a buffer chain using Cadence CADtools)
           Lab 4  - Design of a VCO Oscillator (using Cadence)
           Lab 5  - Design a 6 bit adder for both Density and Performance (using Cadence)