BOSTON UNIVERSITY COLLEGE OF ENGINEERING
Department of
Electrical and Computer Engineering
Date/Time/Place: M & W, 2:00-4:00 PM, PHO 205
Instructor: Prof. Ronald W.
Knepper
Office
Hours: M/T/W/R 4:00-6:00 PM, PHO 439
e-mail: rknepper@bu.edu, Phone: 353-0223
webpage: http://people.bu.edu/rknepper/sc500/class.html
Course Description:
This course will teach the fundamentals of CMOS and
SiGe BICMOS RF and analog circuit design techniques used in today’s advanced
mixed-signal integrated circuit applications, such as a single chip radio. Topics to be covered include low noise
amplifiers, oscillators, mixers, demodulators, phase-locked loop, switched
capacitor circuits, A/D and D/A converters, low power design, RF design
techniques, and mixed-signal circuitry typical of modern telecommunications
technology. The course will include
VLSI laboratory exercises involving the design, layout, and simulation of
RF/analog integrated circuits using Cadence SpectreRF CAD software
tools. (4 credits)
Prerequisites: SC410, SC412, & SC571 (or permission of
instructor)
Texts: T.H.Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge, 1998.
D.Shaeffer
and T.H.Lee, Low-Power CMOS Radio Receivers, Kluwer, 1999.
References:
1. Johns and Martin, Analog Integrated Circuit Design, Wiley, 1997.
2. Gray, Hurst, Lewis,
Meyer, Analysis and Design of Analog Integrated Circuits, 2001
Course Methodology:
The
course involves the use of a coordinated set of lectures, labs, homework, and
exams to teach RF/mixed-signal integrated circuit design based on today’s CMOS
and BICMOS technologies. Labs are
designed to introduce the student to the Cadence SpectreRF CAD design tools,
starting with circuit simulation from the schematic, then physical layout,
design rule and logic-versus-schematic checking, and finally circuit simulation
using extracted models based on the layout.
Tutorials will be utilized to help students learn the use of Cadence
SpectreRF.
Grading: Mid-term Exam 25%
Final
Exam 30%
Labs 35%
Homework 10%
|
|
Schedule of Lectures and
Exams: |
|
|
Dates |
Topic Description |
Text/Reference |
|
9/4 |
SiGe
BICMOS Technology: process and
fabrication |
J&M Ch 2, literature |
|
9/9 |
SiGe
BICMOS Technology: layout and design
rules |
J&M Ch 2, 6HP manual |
|
9/11 |
Review
MOS device physics and SiGe NPN device physics |
Lee Ch 3 + RWK notes |
|
9/16 |
Compact
analog/RF circuit models for BICMOS devices |
Lee Ch 3 + RWK notes |
|
9/18 |
Passive IC components (inductors, capacitors, resistors) on-chip |
Lee Ch 2 |
|
9/23 |
Current mirrors and amplifier fundamentals |
J&M Ch 3 & 5 |
|
9/25 |
Operational
amplifiers and comparators |
J&M Ch 6 & 7 |
|
9/30 |
Switched
capacitor circuits |
J&M Ch 10 |
|
10/2 |
Digital-to-analog
converters (DAC) |
J&M Ch 11 & 12 |
|
10/7 |
Analog-to-digital
converters (ADC) |
J&M Ch 13 |
|
10/9 |
Distributed systems, transmission lines, Smith chart, S-parameters |
Lee Ch 5 & 6 |
|
10/15 |
Estimating bandwidth, risetime, and delay |
Lee Ch 7 |
|
10/16 |
High
frequency amplifier design |
Lee Ch 8 |
|
10/21 |
Mid-Term Exam |
|
|
10/23 |
Cadence
SpectreRF Tutorial – PSS, noise, distortion (in VLSI Lab) |
Cadence Manual |
|
10/28 |
Discuss
Mid-Term, Low Power Design, S/C Technology Scaling |
Literature, RWK notes |
|
10/30 |
Biasing,
Band Gap Reference |
Lee Ch 9 |
|
11/4 |
Noise
in Semiconductor Devices |
Lee Ch 10 |
|
11/6 |
Low noise amplifier design techniques |
Lee Ch 11 |
|
11/11 |
Mixers |
Lee Ch 12 |
|
11/13 |
RF
power amplifier design |
Lee Ch 13 |
|
11/18 |
Feedback systems, root-locus techniques, stability
|
Lee Ch 14 |
|
11/20 |
Oscillators
and phase noise |
Lee Ch 16 & 17 |
|
11/25 |
Phase-locked
loops |
Lee Ch 15 |
|
11/27 |
No
Class (Thanksgiving holiday begins) |
|
|
12/2 |
Radio
receiver architectures, radio reception fundamentals |
S&L Ch 1 & 2 |
|
12/4 |
A
GPS receiver architecture |
S&L Ch 3 |
|
12/9 |
Active
Filters in Low Power CMOS |
S&L Ch 6 |
|
12/11 |
A
CMOS GPS Receiver Design |
S&L Ch 7 |
|
TBA |
Final
Exam
|
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|
|
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|
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Schedule for Labs: |
|
|
|
Lab |
Description |
Assigned |
Due |
|
1 |
BICMOS Device Characteristics: dc, small signal ac, fT |
9/9 |
9/24 |
|
2 |
Analog Design:
BICMOS Sample and Hold Circuit |
9/25 |
10/11 |
|
3 |
RF Design: Low
Noise Amplifier (S-parameters and Noise) |
10/16 |
11/4 |
|
4 |
RF Design: Mixer
Circuit (PSS, IIP3) |
11/4 |
11/21 |
|
5 |
RF Design: VCO
(Phase Noise) and PLL |
11/25 |
12/12 |
|
|
|
|
|
|
|
|
|
|
HW
|
Schedule for Homework: |
Assigned |
Due |
|
1 |
Bipolar Transistor Characteristics and Model, Designing
Passives |
9/4 |
9/20 |
|
2 |
Current Mirrors, Amplifier Design, Comparators, Switched
Capacitor Circuits |
9/23 |
10/2 |
|
3 |
Estimating Bandwidth, S-Parameters, High Freq Amplifiers |
10/2 |
10/16 |
|
4 |
Noise, Low Noise Amplifiers, Bias Circuits |
10/28 |
11/11 |
|
5 |
Mixers, Power Amplifiers |
11/11 |
11/25 |
|
6 |
Oscillators, PLL, RF Radio Front End |
11/25 |
12/4 |
Course Policies:
1.
Missed Exam – Absence
from an exam can be excused only for reasons of illness, death in a family, or
unavoidable travel. In each case,
permission of the instructor in advance is required, as well as a written
authorization by a physician (in the case of illness) or other appropriate
authorized signature. The student will
be required to take a makeup exam.
2.
Late Homework – Late
homework will be accepted up until the date the solutions are discussed in
class. A penalty of 10% off per day
will be applied. A weekend counts as a
single day.
3.
Late Labs – Late labs
will be accepted, but with a penalty applied of 5% off per day up to a maximum
of 50% off. It is advantageous for
students to complete all the labs.
4.
Attendance –
Attendance in class is considered essential and required. Pop quizzes will be given on occasion with
the opportunity to earn extra credit points by taking the quiz. Makeup quizzes will not be accepted.
Report any
problems with system, accounts, or passwords to the system administrator anc@bu.edu with a copy to rknepper@bu.edu. Report any problems with the assignments, software tools, or
grading to Prof. Knepper. Be
descriptive and indicate which machine is being used so they can recreate the
problem if needed.
The design
equipment must *NEVER* be turned off.
Terminals and computers should be left on at all times unless otherwise
instructed. Do not "move"
mice or keyboards from machine to machine as this completely stops the machines
and they must be rebooted. Please do
not attempt to reboot the workstations – call Aaron Caine if problems are
encountered.
The manuals in
the lab are for use in the lab only and are not to be removed. These manuals are written to be used at a
terminal and are not of much practical use outside of the lab.
Please try to
send output to the printers only when necessary; i.e., only when directed by a
lab assignment. Grad students printing
theses and students who like hardcopy of downloads from the net, please take
special notice of this request.
How To Use the
MAN Pages:
There are 2
sets installed on the system: the
'normal' ones, and the ones for the cadtools.
Each manual page program works the same and takes the same arguments. The only difference is that the program for
the cadtools is called cadman, and the normal one is called man. For example, if you want help on irsim,
type: % cadman irsim. If you want help
on arguments to ls, type: % man ls
Do the tutorials! Completing them greatly increases your
proficiency with the tools. Most
answers to questions about the tools can be found in the tutorials.
All labs should be in their own
directory off your HOME directory (the directory you land in when you first log
in: also called ~ for short). All
directory names are the name of the assignment and are specified in the lab
write-up.
Using RLOGIN
to Remotely Log in to the VLSI Lab:
Your full mail
address is username@vlsi.bu.edu. There
are many hosts available for your remote login to the VLSI lab. Check out the list posted on the wall.
There are two
ways to log into the vlsi lab cluster, either from:
1. another UNIX system running X Windows or an Xterminal on campus.
2. a dialup line with a modem (as in from home
on a terminal emulator)
Situation 1:
in X Windows when logging in from another UNIX workstation running X Windows
(acs,bass workstations, etc) or an Xterminal (basement of 111 Cummington St.,
third floor of Mugar Library, etc.), two procedures must be observed if
graphical programs are to be run (Cadence, for example)
- one must give
access to the remote system to write graphics to the local X Display
- one must set
the remote system to send graphics output to the local X Display
In other
words, if you are on miller in another lab and want to log in to vlsi21, you
must do the following:
miller %
miller % xhost
vlsi21
miller % rlogin
vlsi21
<log into
vlsi21>
vlsi21 % setenv
DISPLAY otto:0.0
vlsi21 %