CURRENT
POSITION |
Professor, Electrical and Computer Engineering
Boston University
Boston, MA
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| EDUCATION |
PhD in Electrical Engineering, 1969 |
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Carnegie Mellon University
Pittsburgh, PA |
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Thesis: Characterization, Electrical Noise, and Modeling
of Silicon Double Injection Diodes at 77K |
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Advisor: Prof. Angel G. Jordan |
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MS in Electrical Engineering, 1966 |
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Carnegie Mellon University
Pittsburgh, PA |
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BS in Electrical Engineering, 1965 |
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Carnegie Mellon University
Pittsburgh, PA |
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BA in Pre-engineering, 1965 |
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Juniata College
Huntingdon, PA |
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PROFESSIONAL
EXPERIENCE |
9/99-present Boston University
Department of Electrical and Computer Engineering
Boston, MA
Professor
Responsible for teaching courses in SC312: Computer Organization
and SC466: Senior Design Project. Research interests
include VLSI device & circuit design/modeling of low power SOI for
analog/mixed signal appl's, Si/Ge HBT/BICMOS RF/mixed signal communications
ckts, and chip interconnect performance modeling & simulation.
1995-1999 IBM Microelectronics, SRDC
Hopewell Junction, NY
Senior Technical Staff Member
Responsible for technical strategy planning, semiconductor technology
roadmap competitive assessment, silicon device performance/density/cost
projection, interconnect performance evaluation, advanced packaging studies,
and
new/emerging technology facilitation.
1994-1995 Stanford University Center for Integrated Sys
Stanford, CA
IBM Visiting Scholar
Responsible to represent IBM at CIS, schedule & present seminars,
mentor PhD students, arrange visits, facilitate university interaction
& PhD student hiring, team teaching of graduate level EE S/C device
course.
1991-1993 IBM Microelectronics, SRDC
Hopewell Junction, NY
Senior Manager & STSM
Senior manager of Technology Modeling project reporting to Director
of ASTL, responsible for development, consolidation, and support of TCAD
software 2D/3D process and device simulation tools.
1979-1991 IBM Microelectronics, Hopewell Jct, NY
Project Manager, Advanced Bipolar Devices
Management of 2nd level projects within IBM in advanced bipolar device
design, device technology modeling, and exploratory devices. Responsibilities
included staffing, project planning & management, funding & coordination
of university contracts, SRC mentoring, and design/development/modeling
of IBM's advanced bipolar & BICMOS device technologies.
1969-1979 IBM Components Division, Hopewell Jct,
NY
Staff Engineer/Advisory Engineer
Circuit design, device design, and modeling of IBM bipolar and early
FET technology - both memory and logic. Development of high speed
1K x 3 bipolar cache array circuit technology for S/370 application.
Invention of E/D FET dynamic depletion mode circuitry for bootstrap driver
and voltage doubling ckt's. Invention of early 1972 DRAM cell layout
for 8K bit array design. Development of internal FET Circuits
Design course MOSFET Applications.
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| HONORS and AWARDS |
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IBM Outstanding Innovation Award, 1989, Semiconductor Device Modeling
& Design
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IBM Outstanding Technical Achievement Award, 1983, Conception and Definition
of Circuit Techniques for High Performance Arrays
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IBM Division Award, 1988, Hera Project
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Four IBM Informal Awards
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5th Plateau IBM Invention Achievement Award: 14 patents issued
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Elected to Tau Beta Pi, Eta Kappa Nu, Sigma Xi
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| PROFESSIONAL MEMBERSHIPS |
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Elected Fellow, IEEE, 2000
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IEEE BCTM Technical Program Committee, '89-'94
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Chair, BCTM Modeling Subcommittee, '92-'94
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SRC CSMS CRADA IBM TAB Rep, '95-'99
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SRC Mentor, Microstructures TAB, '85-'95
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Editor, Solid-State Electronics, '83-'93
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| TEACHING EXPERIENCE |
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Computer Organization, SC312, Boston Univ, 9/99
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Graduate level EE316 device course, team teaching lectures, Stanford University,
1995
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MOSFET Applications, self-developed IBM internal circuits course, 1972-1983
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Semiconductor Electronics, Carnegie Mellon University, 1967 Fall Semester
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| TECHNICAL, PROFESSIONAL
and RESEARCH INTERESTS |
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Advanced CMOS, Bipolar, and BICMOS Devices
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Semiconductor Physics, Device Modeling
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High Performance Digital Circuit Design
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Analog & RF/Communications Circuit Development
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2D/3D Semiconductor Modeling & Simulation
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Low Power SOI Devices and Circuit Application
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High Performance SiGe Devices/Circuits
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Embedded DRAM
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Advanced Interconnect Performance Modeling
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Silicon CMOS Technology Scaling and Roadmap
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