| Pixel Timing Worksheet | |||||||||||||||
| DPC 8/21/2004 | |||||||||||||||
| req > 1.5us | req > 200ns | ||||||||||||||
| DC | END_RD_COLS-RD_COLS-1 | Pix 2 | Int 2/ AD 2 | Pix 1 | Int 1 / AD 1 | F1 | F2 | (F1)+(F2) | To Array | To Leach | TB | TW | |||
| DC | CLK3+0000+FSYNC+F1+00 | 40 | ; select pixel 2 | F2 | TB2 | ||||||||||
| DC | $00F7C0 | 40 | ; SXMIT the Previous Pixel 2 - X32 | Burst->DMA | |||||||||||
| DC | VIDEO+$0F0000+%0111 | 640 | ; Settling Time for Pix Transfer (600+40ns) | 7400 | |||||||||||
| DC | VIDEO+$130000+%0101 | 800 | ; Reset integrator (760+40ns) | Reset | |||||||||||
| DC | VIDEO+$050000+%0111 | 0 | ; Settle Time (200+40ns) | Settle | 1520 | ||||||||||
| DC | VIDEO+$8F000+%0110 | 4840 | ; Integrate (4800+40ns) | Int pix 2 | 6840 | ||||||||||
| DC | VIDEO+$000000+%1110 | 40 | ; Move A/D data to FIFO while integrate | move->FIFO | |||||||||||
| DC | VIDEO+$0A0000+%0110 | 440 | ; Continue Integrate time (400+40ns) | 5320 | 6840 | ||||||||||
| DC | VIDEO+$010000+%0111 | 80 | ; Stop Integrate time and Settle (40+40ns) | Settle | |||||||||||
| DC | VIDEO+$010000+%0011 | 80 | ; Start A/D convert (40+40ns) | Convert | |||||||||||
| DC | VIDEO+$010000+%0111 | 80 | ; Clear A/D Convert Sig (40+40ns) | pix 2 | 7080 | ||||||||||
| DC | CLK3+0000+FSYNC+F1+F2 | 40 | ; deselect pixel 2 | ||||||||||||
| DC | VIDEO+$060000+%0111 | 280 | ; Hold A/D input & no overlap F1+F2 (240+40ns) | req > 2000 | 320 | 320 | |||||||||
| DC | CLK3+0000+FSYNC+00+F2 | 40 | ; select pixel 1 | F1 | TB1 | ||||||||||
| DC | $00F7C0 | 40 | ; SXMIT the Previous Pixel 1 - X32 | Burst-DMA | |||||||||||
| DC | VIDEO+$0F0000+%0111 | 640 | ; Settling time for Pix Transfer (600+40ns) | 7400 | |||||||||||
| DC | VIDEO+$130000+%0101 | 800 | ; Reset integrator (760+40ns) | Reset | |||||||||||
| DC | VIDEO+$050000+%0111 | 0 | ; Settle Time (200+40ns) | Settle | 1520 | ||||||||||
| DC | VIDEO+$8F0000+%0110 | 4840 | ; Integrate (4800+40ns) | 6840 | Int pix 1 | ||||||||||
| DC | VIDEO+$000000+%1110 | 40 | ; Move A/D data to FIFO while integrate | move->FIFO | |||||||||||
| DC | VIDEO+$0A0000+%0110 | 440 | ; Continue Integrate time (400+40ns) | 5320 | 6840 | ||||||||||
| DC | VIDEO+$010000+%0111 | 80 | ; Stop Integrate time and Settle (40+40ns) | Settle | |||||||||||
| DC | VIDEO+$010000+%0011 | 80 | ; Start A/D convert (40+40ns) | Convert | |||||||||||
| DC | VIDEO+$010000+%0111 | 80 | ; Clear A/D Convert Sig (40+40ns) | Pix 1 | 7080 | ||||||||||
| DC | CLK3+0000+FSYNC+F1+F2 | 40 | ; deselect pixel 1 | ||||||||||||
| DC | VIDEO+$060000+%0111 | 280 | ; Hold A/D input & no overlap F1+F2 (240+40ns) | 320 | 320 | ||||||||||