Bharat Sukhwani
 
  1. Email:        bharats_at_bu_dot_edu
  2. Phone:      (508) 410-7480
  3. Postal:       1419 Commonwealth Ave. # 301
  4.                        Brighton, MA, 02135
 
  1. Boston University, Boston, MA
  2. (pursuing)
  3. April 2005
  4. Bachelor of Engineering - Electronics Engineering
  5. Bombay University, Mumbai, India
  6. July 2001
 
  1. Research Assistant - CAAD Lab
  2. Boston University, Boston, MA
  3. Fall 2005 - Summer 2006, Fall 2007 - Present
  4. Research Intern - Embedded Systems Group
  5. Microsoft Research, Redmond, WA
  6. Summer 2007
  7. Teaching Fellow - ECE Department
  8. Boston University, Boston, MA
  9. Fall 2006-Spring 2007
  10. Research Assistant - Digital VLSI Design Lab
  11. Spring 2004 - Fall 2004
  12. Research Assistant - Artificial Intelligence Lab
  13. Fall 2002 - Fall 2004
  14. Software Programmer,
  15. Mastek Ltd., Mumbai, India
  16. August 2001 - June 2002
 
  1. M.C. Herbordt, Y. Gu, T. VanCourt, J. Model, B. Sukhwani, and M. Chiu (2008). Computing Models for FPGA-Based Accelerators, Computing in Science & Engineering, 10 (6), pp. 35-45
  2. M.C. Herbordt, J. Model, B. Sukhwani, Y. Gu,  T. VanCourt (2007). Single Pass Streaming BLAST on FPGAs, Parallel Computing, Special issue on High-Performance Computing Using Accelerators
  3. J. M. Wang, B. Sukhwani, U. Padmanabhan, D. Ma, K. Sinha (2007). Simulation and Design of Nanocircuits with Resonant Tunneling Devices, IEEE Transactions on Circuits and Systems, Part I, 54(6), pp. 1293-1304, June 2007
  4. M.C. Herbordt, T. VanCourt, Y. Gu, B. Sukhwani, A. Conti, J. Model, D. DiSabello (2007). Achieving High Performance with FPGA-Based Computing, IEEE Computer, 40 (3), pp. 50-57, March 2007
 
  1. B. Sukhwani and M.C. Herbordt (2009). GPU Acceleration of a Production Molecular Docking Code, To appear in the Proceedings of the Workshop on General-Purpose Computation on Graphics Processing Units, March 2009.
  2. B. Sukhwani and M.C. Herbordt (2008). Acceleration of a Production Rigid Molecule Docking Code, Proceedings of the International Conference on Field Programmable Logic and Applications, September 2008.
  3. B. Sukhwani, A. Forin and N. Pittman (2008). Extensible On-Chip Peripherals, Proceedings of the IEEE Symposium on Application Specific Processors, July 2008
  4. M.C. Herbordt, Y. Gu, T. VanCourt, J. Model, B. Sukhwani, and M. Chiu (2008). Computing Models for FPGA-Based Accelerators with Case Studies in Molecular Modeling, Proceedings of the Reconfigurable Systems Summer Institute (RSSI 2008), July 2008
  5. B. Sukhwani, A. Forin and N. Pittman (2008). I/O Subsystem of eMIPS Extensible Processor, Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, April 2008 (Poster)
  6. M.C. Herbordt, J. Model, Y. Gu, B. Sukhwani, T. VanCourt (2006). Single Pass, BLAST-Like, Approximate String Matching on FPGAs, Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, April 2006
  7. B. Sukhwani, J. M. Wang (2005). A Stepwise Constant Conductance Approach for Simulating Resonant Tunneling Diodes, Proceedings of the IEEE International Symposium on Circuits and Systems, May 2005
  8. B. Sukhwani, U. Padmanabhan, J. M. Wang (2005). NanoSim: A Step Wise Equivalent Conductance based Statistical Simulator, Proceedings of Design Automation and Test in Europe, March 2005
  9.  
  10.  
  11. Dean’s Research Fellowship, College of Engineering, Boston University, Boston, MA, 2005-2006
  12. Graduate Tuition Scholarship, College of Engineering, University of Arizona, Tucson, AZ, 2002
  13. Sir Ratan Tata Trust Scholarship for Undergraduate Studies Bombay, India, August 2000 (50 out of 8000 students)
  14. Outstanding Performance Award in Analytical section of Graduate Record Examination (Top 10 worldwide for  March, 2001)
  15. Ranked 25th among 1722 students of University of Mumbai in BE (Electronics) degree examination
 
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